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Team Lead | Semiconductor, Embedded Systems, CPU, GPU
UVM Design Verification Engineer
Working with a globally leading Semiconductor company on cutting-edge ASICs, SoCs, and IPs.
Responsibilities:
* Perform verification planning
* Develop the verification environment from scratch using UVM.
* Conduct functional verification and code coverage
* Define and implement test cases
* Provide regression debug support and other flow/infrastructure development
* Implement verification of ASICs / ICs / SoCs
Skills:
* SystemC / C/C++ is a plus
* Good knowledge of scripting languages such as Python, CSH, Make
Seniority level
* Mid-Senior level
Employment type
* Full-time
Job function
* Engineering, Design, and Research
Industries
* Semiconductor Manufacturing
* Computer Hardware Manufacturing
* Appliances, Electrical, and Electronics Manufacturing
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