FPGA Design Engineer
Job Responsibilities
1. RTL block design (SystemVerilog / Verilog / VHDL)
2. FPGA system assembly with in-house blocks, vendor macros, and reference designs.
3. Testbench creation and design verification
4. FPGA implementation in Xilinx Vivado tool-set, with complete timing constraints.
5. Setup and debug with Xilinx ILA
6. Potential collaboration with hardware, software, analog/digital IC design engineers.
Requirements
1. Degree in Electrical/Electronic Engineering or similar technical field.
2. Minimum of 5 years of experience in IC or FPGA design, with 5-10 years in the industry.
3. Able to understand both Verilog/SystemVerilog and VHDL
Preferences
1. Experience with Xilinx Ultrascale+ devices
2. Experience working with DDR RAM controllers and efficient memory access
3. Prior experience with high-speed interfaces (DPHY, LVDS, GbE) on FPGA a significant advantage.
#J-18808-Ljbffr