At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to develop and enhance the Protium FPGA-Based Prototyping product which is used by leading CPU / GPU / HyperScaler companies for pre-Silicon software validation of their SOC's.
You will develop new algorithms and optimizations for QoR (Quality of Results) and performance for the Protium Compiler working with a small team of super star engineers to develop our next generation FPGA based verification platform.
Responsibilities: Enhance Static Timing Analysis (STA) in the Protium Compiler.
Implement new algorithms in C++ to support Multi-cycle constraints and other SDC exceptions such as set_false_path.
Optimize memory and runtime by using multi-threading and distributed computing.
Develop the EDA automation flow for the platform with other engineers.
Write Design Specifications and Unit Tests for your code.
Position Requirements / Qualifications: Bachelors in Computer Science, Electrical / Computer Engineering and a minimum of 4 years of related experience, or Masters and a minimum of 2 years of related experience, or PhD with thesis in a relevant area.
Solid contributor in the FPGA or ASIC prototyping / synthesis / verification space with a track record of delivering excellent QoR on these platforms.
Excellent programming skills in C / C++ with clear documentation of work.
Comfortable with Verilog or SystemVerilog and understanding of digital circuits.
Experience with popular logic simulators and some knowledge of multi-threaded / concurrent programming are pluses.
Exceptional software skills and Object Oriented Programming experience are essential.
Knowledge and experience of ML / AI algorithms and deployment in production code is a plus.
We're doing work that matters.
Help us solve what others can't.
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