Full Custom Memory Layout Engineer
Tasks will include:
1. Performing full Custom Layout Design for MRAM.
2. Designing layouts of various blocks and performing Chip Level verifications after tiling them as a single memory instance.
3. Layout Design for various memory blocks such as Rowdecoder, Control, Sense Amplifier, etc.
4. Tiling blocks to create a single memory instance and performing Layout verifications.
5. CHIP Level verification and signoff after making connections to the PAD.
Required Knowledge and Skills
1. You must have a minimum of 6+ years experience in the role or a similar position.
2. You must possess a strong knowledge of Memory layout fundamentals and have experience in designing layouts for deep submicron technologies.
3. Should be able to perform all verifications like DRC, LVS, etc., and perform Full CHIP signoff.
4. Some experience in designing SRAM would be an advantage.
5. Some prior knowledge of SKILL coding would also be an advantage.
6. Preparation of reports.
#J-18808-Ljbffr