Come join Analog Devices (ADI) – a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare.ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future. About Analog DevicesAnalog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X). The Engineering Enablement Org is part of the CTO at Analog Devices and is responsible for providing best-in-class tools, flows, methodologies and support to engineering teams across the company to accelerate product development. This position is for an opening in the Systems Verification and Validation (SVV) team within the Engineering Enablement org, focused on the Verification IP Development. Overall, SVV team works to define and promote the adoption of design verification best practices, including Metric-Driven Verification, UVM, Verification IP, DV tools, Formal, FuSa, Security, Portable Stimulus, Emulation and FPGA prototyping technologies. Job Responsibilities Architect, design and develop best-in-class UVM/C based Simulation, Accelerated and Formal Verification IPs for latest generation complex protocols. Develop reusable protocol specific Conformance Test Suite (CTS), Spec annotated Verification plan (vPlan), Portable Stimulus compatible sequences and userguide. Integrate VIPs into ADI's UVM Testbench Generator and make it compatible with ADI DV ecosystem. As a protocol & VIP expert, support engineering DV teams to adopt in-house and vendor VIPs (including Accelerated VIPs, Formal VIPs), create & deliver protocol training materials, assist in debugging VIP/protocol issues, share learnings at internal and external conferences. Explore innovative DV methodologies to improve the existing solutions further. Job Requirements MEng/MSc or BEng/BSc in VLSI/Electronics/Electrical EngineeringFamiliarity with digital design, digital verification fundamentals, SV, SVA, UVM and MDVProficient in Python/Perl (C/C++ is a plus)Strong analytical, problem-solving and debugging skillsHighly motivated and team playerAbility to manage multiple tasks and work effectively in a fast-paced environmentExcellent debugging, analytical and communication skillsExposure and technical familiarity with commonly used protocols - AMBA, SPI, I2C, etc (JESD, UCIE, ASA is a plus)Exposure to hardware emulation platform (Palladium)Exposure to simulators (XLM/VCS etc), Debug solution (Verisium/Verdi), version control software (P4, GIT, etc) and IDE (DVT, etc) #LI-CO1For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.Job Req Type: Graduate Job Required Travel: Yes, 10% of the time