Location: Ireland
About The Role
The Multimedia Video and Computer Vision HW Design team works on the design and development of complex IP Cores that can support cutting-edge Video CODEC Standards and Advanced Computer Vision applications.
Sensors-based technology has a wide range of applications including navigation, gaming, smart user interface, multimedia, virtual reality and augmented reality. This challenging position offers the opportunity to work with leading edge sensor technologies embedded in smartphones, automotive, IOT, smartwatches as well as other consumer electronics devices.
Your responsibilities will include:
* Leading and managing a team of engineers, including mentoring, and coaching junior engineers
* Deploying Industry-Leading Verification Methodologies such as UVM and Formal Verification
* Developing Testbenches and Verification Components such as UVCs, C models, and Vertical/Horizontal re-usable Verification Environments.
* Verifying sensor algorithms RTL for ASIC tapeout quality delivery
* Test plan development based on Design documents and interaction with design/systems engineers
* Implementing C model integration within UVM framework.
* Writing SystemVerilog assertions
* Debugging, verifying, optimizing, and bit-exact matching with test vectors
* Analyzing coverage data and working with Design teams to address coverage holes
* Develop/augment framework for running regressions
* Debugging regression failures with design/Systems teams
* Support integration of design in higher-level subsystem including test planning, test vector delivery, and debug of test vectors at the integration level
* Python automation for improving workflows and team efficiency
* Participate in all project reviews
* Supporting software and other teams with debug
* Documentation
Education Requirements:
* Bachelor's degree in Science, Engineering, or related field.
* 3+ years ASIC design verification, UVM-based functional verification, or related work experience.
* Experience using formal verification tools like Jasper or VC_Formal is a plus
* Experience with SystemC and Matlab are a plus.
* Gate level Simulation debug and usage of power extraction tools is a plus
* Experienced with constrained-random verification environment and flow build-up with UVM, Coverage-Driven verification methodology
* Experienced with Assertions like System Verilog Assertions
* Experience with debugging test failures and report verification result to achieve the expected code/functional/line coverage goals
* Extensive usage of RTL simulation tools.
* Familiarity with C/C++
* Strong analytical skills and ability to work in a dynamic and fast paced team environment
* Excellent written and verbal skills
* Strong interpersonal skills and a good team player
* Strong technical leadership and coaching skills
Where you will be working
Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies.
There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life.
A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
What's on Offer
* Apart from working in an open, relaxed and collaborative space, you will enjoy: Salary, stock and performance related bonus
* Maternity/Paternity Leave
* Matching pension scheme
* Education Assistance
* Relocation and immigration support (if needed)
* Life, Medical, Income and Travel Insurance
* Subsidized memberships for physical and mental well-being
* Employee run clubs, including, running, football, chess, badminton + many more
* Work from country of origin for up to 12 weeks per year
#J-18808-Ljbffr