Has a strong desire to learn and explore new technologies.
Demonstrates good analysis and problem-solving skills.
Prior knowledge and experience in tools like DC, ICC2, StarRC, PT-SI is a definite advantage.
Should be a strong team player and excellent communicator as the role involves daily technical interaction with local and US counterparts.
He/She will be part of the SNPS DDR/HBM/UCIe/Die-to-Die IP implementation team and responsible for the implementation and power signoff of world-class DDRs at cutting-edge technology nodes.
Timing closure above ~2GHz, mixed signal macro IP integration, and building efficient clock trees with very tight skew balancing are some of the challenges as part of the day-to-day job.
Prior working knowledge in the DDR power signoff would be an added advantage.
Should be very hands-on and able to technically lead a team of 4-6 junior engineers towards successful completion of projects on time and with top quality.
Typically requires a minimum of 9+ years of related experience.
Possesses a full understanding of specialization area plus working knowledge of multiple related areas.
Independently resolves a wide range of issues in creative ways on a regular basis.
Customarily exercises independent judgment in selecting methods and techniques to obtain solutions.
Performs in a project leadership role.
Contributes to complex aspects of a project.
Determines and develops approaches to solutions.
Work is independent and collaborative in nature.
Provides regular updates to the manager on project status.
Represents the organization on business unit and/or company-wide projects.
Guides more junior peers with aspects of their job.
Frequently networks with senior internal and external personnel in own area of expertise.
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