Job Title:
Test & Validation Engineer
Alternate Job Titles: Staff Engineer, Test & Validation, R&D Staff Engineer
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About Us:
Synopsys drives innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence.
We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
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About You:
You are an experienced and highly motivated individual with a passion for technology and innovation.
You have a strong technical background in RTL, Physical Design, and post-silicon test and testability development.
Your expertise in debugging and developing Process, Voltage, Temperature, Current, and Droop sensors is unparalleled.
You thrive in a dynamic environment and excel in communication, teamwork, and leadership.
You are eager to learn and contribute to the development of state-of-the-art PVT IP sensors that are integral to the silicon lifecycle monitoring process.
You possess a mindset geared towards meticulous IP debug and documentation, ensuring the highest standards of product development and performance.
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Key Responsibilities:
* Serving as the single point of contact for post-silicon debug activities.
* Enabling Product Requirement Documents (PRDs).
* Working to enable IP as a product development platform.
* Handling hands-on post-silicon test setups.
* Collaborating on top-level physical design, board-level, and package-level designs.
* Developing post-silicon reports and conducting debug analysis.
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The Impact You Will Have:
* Driving the successful development and deployment of PVT IP sensors.
* Enhancing the reliability and performance of Synopsys' silicon lifecycle monitoring solutions.
* Ensuring high-quality product development through meticulous testing and debugging.
* Contributing to the continuous innovation in chip design and software security.
* Supporting Synopsys' leadership in the market for PVT IP developments.
* Empowering the creation of high-performance silicon chips used in various advanced technologies.
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Requirements:
* Hands-on experience in post-silicon test setups.
* Sound knowledge of Digital/AMS chip design and post-silicon debug.
* BS or MS degree in Electrical Engineering with 3+ years of experience.
* Understanding of top-level physical design, board-level, and package-level designs.
* Expertise in RTL development and physical design.
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About The Team:
You will be part of the rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors.
This team is dedicated to conceptualizing, designing, and productizing state-of-the-art sensors that play a critical role in the silicon lifecycle monitoring process.
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Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
Total rewards include both monetary and non-monetary offerings.
Your recruiter will provide more details about the salary range and benefits during the hiring process.
Estimated Salary: $120,000 - $180,000 per year