Analog IC Layout Engineer (SERDES)
This is an opportunity for an IC Layout engineer to join a global market leader of design solutions. In this role, you will use your skills in IC Layout to enable semiconductor companies adopting solutions and associated IC design methodologies.
The Layout Engineer is expected to design quality layouts of analog/mixed circuit blocks and work with global teams which operate in different time zones.
For this position, requirements include:
1. BSc required, MSc/MEng preferred in electronics engineering or another relevant discipline.
2. Experience working with custom layout designs.
3. Background in CMOS SERDES.
4. Experience implementing high accuracy cells and high-speed circuits.
5. Experience working with project managers and circuit designers.
6. Excellent problem-solving skills.
7. A team player who is passionate about technology but also understands business requirements.
For more information and to apply, please contact Molly.
#J-18808-Ljbffr