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Senior Test Development Engineers with J750 experience
Client:
Chipright
Location:
Ireland
Job Category:
Other
EU work permit required:
Yes
Job Reference:
e78fd7c5e6d0
Job Views:
85
Posted:
21.01.2025
Expiry Date:
07.03.2025
Job Description:
Senior Test Development Engineers Chipright seeks a highly motivated and experienced test engineer to work in validating our Irish customer’s latest design using J750. The candidate should have hands-on experience in debugging silicon tests and must be proficient with ATE Engineering, Product Characterization & qualification testing.
Responsibilities:
1. Plan and arrange the labor, schedules, and equipment required for testing and evaluating standard and special devices.
2. Provide test area with parameters for sampling testing and specify tests to be performed.
3. Compile data and define changes required in testing equipment, testing procedures, manufacturing processes, or new testing requirements.
4. Test all customer samples and for special tests that cannot be performed in the test area.
5. Respond to customer/client requests or events as they occur.
6. Develop solutions to problems utilizing formal education and judgment.
7. Work closely with various Design teams' programmable logic, memory, digital IP, analog and high-speed SERDES from the initial IP/product planning phase through design implementation and verification.
8. Define test methodologies, develop test benches & run simulations, deploy test patterns and validate them on silicon.
9. Support product teams with yield improvement and interface characterization.
10. The engineer may be able to work part remote (for example, 3 days onsite/2 days offsite).
Qualifications:
1. BSEE with 6+ years test program development experience.
2. Fully understand digital testing and DFx.
3. Knowledge of ATE tester with programming skills.
4. Hi-Speed SERDES test experience - Script TCL/PERL/Python and programming languages Visual Basic and C/C++.
5. Hands-on problem-solving skills including hardware and software.
6. Preferred Qualifications:
7. MSEE with 6+ years test program development experience.
8. Test experience with digital/analog/mix-signal products.
9. Teradyne J750 and Advantest test development skills.
10. Full understanding of DFx implementation and debugging of SCAN/BIST.
11. Pre-silicon simulation experience and tools of pattern conversion.
12. Team technical lead.
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