Mixed Signal Digital Design Engineer - RTL / IPs
We are working with a global leading technology innovator who's Mixed-Signal IP (MSIP) Digital Design team seeks experienced engineers to design high-performance, low-power mixed-signal IPs for mobile, compute, automotive, and AI applications.
This role requires expertise in ASIC digital design flow, including micro-architecture, RTL coding, front-end implementation, and collaboration with DV and PD teams for verification and physical implementation.
Key Responsibilities:
* Design and implement digital sections of mixed-signal IPs (e.g., SerDes, DDR, PLL, DAC, ADC, sensors).
* Optimize power, performance, and area (PPA) using digital signal processing and computer architecture techniques.
* Use ASIC tools (lint checking, CDC, DFT, synthesis, FV, STA) for design validation and implementation.
* Collaborate with DV team to define test plans, verify designs, and resolve issues.
* Work with PD team on physical design implementation.
* Create design specifications and documentation.
* Support silicon bring-up and debug with the testing team.
Seniority Level
Associate
Employment Type
Full-time
Job Function
Engineering and Other
Industries
Semiconductor Manufacturing
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