FY25 Graduate Design Verification Engineer
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locations: Ireland, Limerick
time type: Full time
posted on: Posted 4 Days Ago
job requisition id: R244654
Come join Analog Devices (ADI) – a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare.
ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.
The Engineering Enablement Org is part of the CTO at Analog Devices and is responsible for providing best-in-class tools, flows, methodologies and support to engineering teams across the company to accelerate product development. This position is for an opening in the Systems Verification and Validation (SVV) team within the Engineering Enablement org, focused on the Verification IP Development. Overall, SVV team works to define and promote the adoption of design verification best practices, including Metric-Driven Verification, UVM, Verification IP, DV tools, Formal, FuSa, Security, Portable Stimulus, Emulation and FPGA prototyping technologies.
Job Responsibilities
1. Architect, design and develop best-in-class UVM/C based Simulation, Accelerated and Formal Verification IPs for latest generation complex protocols.
2. Develop reusable protocol specific Conformance Test Suite (CTS), Spec annotated Verification plan (vPlan), Portable Stimulus compatible sequences and user guide.
3. Integrate VIPs into ADI's UVM Testbench Generator and make it compatible with ADI DV ecosystem.
4. As a protocol & VIP expert, support engineering DV teams to adopt in-house and vendor VIPs (including Accelerated VIPs, Formal VIPs), create & deliver protocol training materials, assist in debugging VIP/protocol issues, share learnings at internal and external conferences.
5. Explore innovative DV methodologies to improve the existing solutions further.
Job Requirements
1. MTech in VLSI/Electronics/Electrical Engineering with 3+ years of relevant industry experience (or) BTech with 5+ years of experience (or equivalent experience).
2. Proficient in UVM VIP development and/or IP/Sub-system/SOC verification.
3. Should have developed complex UVM testbenches from scratch.
4. Proficient in digital design, digital verification fundamentals, SV, SVA, UVM and MDV.
5. Proficient in Python/Perl (C/C++ is a plus).
6. Strong analytical, problem-solving and debugging skills.
7. Highly motivated and team player.
8. Ability to manage multiple tasks and work effectively in a fast-paced environment.
9. Excellent debugging, analytical and communication skills.
10. Exposure and technical familiarity with commonly used protocols - AMBA, SPI, I2C, etc (JESD, UCIE, ASA is a plus).
11. Exposure to hardware emulation platform (Palladium).
12. Exposure to Matlab/Simulink.
13. Exposure to simulators (XLM/VCS, etc), Debug solution (Verisium/Verdi), version control software (P4, GIT, etc) and IDE (DVT, etc).
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For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
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