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Associate Consultant | Semiconductor, Embedded Systems, Artificial Intelligence
Are you a Verification Engineer with a background in GPU and Power Verification that is looking for an exciting new role at a globally known semiconductor multinational?
At European Tech Recruit we are working alongside a market leading chip company, helping them bring on board a GPU Power Verification Engineer to work on cutting edge R&D projects within the GPU space.
Responsibilities:
* Collaborate with the Architecture and Design teams to understand low-power design features and develop a comprehensive verification plan.
* Create and document test plans for design features, ensuring thorough reviews with the design team.
* Develop verification components and testbenches for low-power verification, integrating third-party VIPs/UVCs as needed.
* Build a constraint-random verification environment using SystemVerilog and UVM.
* Adhere to company-defined verification methodologies.
* Conduct Power-Aware Verification in a constrained-random environment, with embedded firmware running on the design.
* Execute regressions and close required Low Power coverage metrics to ensure high-quality design verification.
* Develop portable test setups and reusable verification components for simulation and emulation platforms.
* Debug failures involving hardware-software co-debugging.
* Engage with tool vendors to enhance verification methodologies and improve verification flows.
* Perform system-level RTL simulation and design verification.
* Support SoC DV teams with integration verification, chip bring-up, and post-silicon debug.
Minimum Qualifications:
* Bachelor’s degree in Science, Engineering, or a related field.
* At least 1 year of hands-on experience with SystemVerilog and OVM/UVM-based constrained random verification.
* 1+ years of experience in developing verification components/UVCs and testbenches for RTL verification.
* 1+ years of experience in testbench bring-up, third-party VIP integration, digital design verification, debugging, and waveform analysis.
* 1+ years of experience in UPF-based Power-Aware verification.
* 1+ years of experience in functional coverage model development and/or code coverage closure.
If interested in this role please apply here or send your email direct to je@eu-recruit.com
Seniority level
* Mid-Senior level
Employment type
* Full-time
Job function
* Engineering, Design, and Research
Industries
* Computer Hardware Manufacturing, Semiconductor Manufacturing, and Software Development
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